Dither after adding four PCM 16 bit signals? |
Dither after adding four PCM 16 bit signals? |
 Oct 16 2012, 21:59
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#1
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Group: Members Posts: 2 Joined: 16-October 12 Member No.: 103896  |
Hello all!
My DSP application is implemented on a FPGA using VHDL. Basically there are four 16-Bit PCM audio signals with 48k sample rate. After processing each audio signal separately (one multiplication with a factor that depends on a sensor) i add those four audio signals to get a unified signal. So the question is now, when i add those four audio signals i get a 18 bit result, but i must reduce the bit depth back to 16 bit to hand it to the audio codec chip (DAC). Should i dither in this case? Or what is the typical approach when adding PCM audio signals and then want to go back to the original bit depth? All calculation is done in fixed point. 
This post has been edited by Zopfi: Oct 16 2012, 22:00 |
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Oct 18 2012, 14:51
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#2
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 Group: Members Posts: 452 Joined: 31-May 04 From: Czech Rep. Member No.: 14430 |
VHDL IS the metal.
He has access to all the individual bit "lines" so he can probably just connect those so the former bit 2 becomes bit 0, bit 3 becomes bit 1 etc. and leave former bit 0 and 1 unconnected. This post has been edited by Martel: Oct 18 2012, 14:54 -------------------- HD 238 Sansa Clip+ Vorbis q6; HD 380 Xonar DX FB2k FLAC
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Zopfi Dither after adding four PCM 16 bit signals? Oct 16 2012, 21:59
DVDdoug I'm not a DSP expert, but my intuition says th... Oct 16 2012, 22:27 Arnold B. Krueger QUOTE (Zopfi @ Oct 16 2012, 16:59) Hello ... Oct 16 2012, 22:30 Dynamic The other option is that if the DAC permits 24-bit... Oct 17 2012, 10:18 Zopfi Thanks for the answers. So each time i drop bits e... Oct 17 2012, 19:20 pdq If you are carrying out calculations to a higher p... Oct 17 2012, 19:43
Arnold B. Krueger QUOTE (pdq @ Oct 17 2012, 14:43) If you a... Oct 18 2012, 00:25 |
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