Many professional audio studios use a master clock to synchronize audio equipment. I think that's a good idea.
Some people claim that slaving a DAC (or ADC) to a high quality external clock can improve its performance.
A colleague of mine has built a master clock. He claims that the (absence of) low frequency jitter is responsible for the positive effect it has on various converters.
I'm not sure what to think of that. He told me it can be heard and measured (he didn't give blind listening test results, but I might ask him to do so).
First I'd like to find some background info about the subject.
Does anyone here has more (links to) info about low-frequency clock jitter wrt converter performance ?
Thanks.

Variations in clock time intervals is generally divided into two parts - jitter and drift. The term jitter is generally only used to apply to fairly fast variations (about 1Hz and about), while drift (and several other terms) is used to apply to lower frequency variations. The distinction is arbitrary, and the boundry can move, but it's fairly important.

The effect of drift (slow variations in frequency) at the ADC is to change the frequency of the output. If your ADC clock starts at 44100Hz at the beginning of a track and gets to 44110Hz at the end, and you play back through a DAC with a stable 44100Hz clock, then the music will be shifted down in pitch 0.02%. If the amplitude of the drift is much more this effect can be audible.

Jitter is different. Here, the fast changes in time interval between samples has the effect of spreading the sound out in frequency. If the jitter is random with gaussian PDF (or bimodal, as is common), the spread is also gaussian - effectively smearing the sound over the frequency domain. If this jitter is periodic, then the effect will be to spread the sound out into side bands - much like amplitude modulation. If the jitter is correlated with the data (which is rare in these sorts of systems), the effect is much more complex. I can generate some graphs for you if you are interested.

You should ask your colleague what he means by low frequency jitter and what the improvement in jitter is. There is no doubt that jitter in ADC clocks is audible, but what levels it is audible at is more difficult.

OK, I found some info on his website.

Quote from above info link:
"All active analogue circuits suffer some form of flicker (1/f) noise. The effect of this noise on clock oscillators is to produce low-frequency jitter (wander), the effect of which on sound has been greatly underestimated. Published audible jitter limits have so far been derived from monaural listening tests on tones. A simple listening test establishes that the minimum audible jitter on stereophonic material is orders of magnitude lower. No standard test equipment is available covering the sub-10Hz frequency range. We designed a VLF voltmeter with a bandwidth of 0.1Hz- 30Hz that will reliably measure down to 100nV (full scale bottom range). Equivalent input noise (shorted inputs) is some 10nV (-160dBV) in wide mode (0,1-30Hz), and only 2.5nV (-172dBV) between 1-10Hz."

Does that make sense ?
I should ask him for details about the "simple listening test". Their EE expertise is at a high level, but after being on HA for quite a while I have some doubts about their listening tests.

Maybe if he is keen to prove his method he would provide us with some samples to test, and a proper test could be run with a few people. I would also be very interested in comparing the jitter simulation algorithm I have been playing with with real data.

I've read that the natural thermal noise of bare copper is around -120 dB. Therefore the voltmeter should be frozen.

Pio, they are talking about narrow-band measurements. Therefore noise numbers will be lower than your wide-band value. Again, those guys have a good EE background and won't tell BS. That doesn't mean there's no room for discussion though

Correct, I didn't think about this.